MC68HC08XL36 Datasheet, PDF (170/362 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
TIM
Buffered Output
Compare
Channels 0 and 1 can be linked to form a buffered output compare
channel whose output appears on the TCH0 pin. The TIM channel
registers of the linked pair alternately control the output.
Setting the MS0B bit in TIM channel 0 status and control register (TSC0)
links channel 0 and channel 1. The output compare value in the TIM
channel 0 registers initially controls the output on the TCH0 pin. Writing
to the TIM channel 1 registers enables the TIM channel 1 registers to
synchronously control the output after the TIM overflows. At each
subsequent overflow, the TIM channel registers (0 or 1) that control the
output are the ones written to last. TSC0 controls and monitors the
buffered output compare function, and TIM channel 1 status and control
register (TSC1) is unused. While the MS0B bit is set, the channel 1 pin,
TCH1, is available as a general-purpose I/O pin.
Channels 2 and 3 can be linked to form a buffered output compare
channel whose output appears on the TCH2 pin. The TIM channel
registers of the linked pair alternately control the output.
Setting the MS2B bit in TIM channel 2 status and control register (TSC2)
links channel 2 and channel 3. The output compare value in the TIM
channel 2 registers initially controls the output on the TCH2 pin. Writing
to the TIM channel 3 registers enables the TIM channel 3 registers to
synchronously control the output after the TIM overflows. At each
subsequent overflow, the TIM channel registers (2 or 3) that control the
output are the ones written to last. TSC2 controls and monitors the
buffered output compare function, and TIM channel 3 status and control
register (TSC3) is unused. While the MS2B bit is set, the channel 3 pin,
TCH3, is available as a general-purpose I/O pin.
NOTE:
In buffered output compare operation, do not write new output compare
values to the currently active channel registers. Writing to the active
channel registers is the same as generating unbuffered output
compares.
MC68HC08XL36
170
Timer Interface Module (TIM)
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8-tim4_b
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