MC68HC08XL36 Datasheet, PDF (30/362 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Memory Map
Freescale Semiconductor, Inc.
Register Name Addr.
TIM Channel 1 Register
High (TCH1H)
Read:
$002A Write:
Reset:
TIM Channel 1 Register
Low (TCH1L)
Read:
$002B Write:
Reset:
TIM Channel 2 Status and
Control Register (TSC2)
Read:
$002C Write:
Reset:
TIM Channel 2 Register
High (TCH2H)
Read:
$002D Write:
Reset:
TIM Channel 2 Register
Low (TCH2L)
Read:
$002E Write:
Reset:
TIM Channel 3 Status and
Control Register (TSC3)
Read:
$002F Write:
Reset:
TIM Channel 3 Register
High (TCH3H)
Read:
$0030 Write:
Reset:
TIM Channel 3 Register
Low (TCH3L)
Read:
$0031 Write:
Reset:
IRQ Status and Control
Register (ISCR)
Read:
$0032 Write:
Reset:
Bit 7
Bit 15
Bit 7
CH2F
0
0
Bit 15
Bit 7
CH3F
0
0
Bit 15
Bit 7
IRQF2
0
6
14
6
CH2IE
0
14
6
CH3IE
0
14
6
0
ACK2
0
5
4
3
2
13
12
11
10
Indeterminate after Reset
5
4
3
2
Indeterminate after Reset
MS2B MS2A ELS2B ELS2A
0
0
0
0
13
12
11
10
Indeterminate after Reset
5
4
3
2
Indeterminate after Reset
0
MS3A ELS3B ELS3A
0
0
0
0
13
12
11
10
Indeterminate after Reset
5
4
3
2
Indeterminate after Reset
IMASK2 MODE2 ^IRQF1
0
ACK1
0
0
0
0
1
Bit 0
9
Bit 8
1
Bit 0
TOV2
0
9
CH2MAX
0
Bit 8
1
Bit 0
TOV3
0
9
CH3MAX
0
Bit 8
1
Bit 0
IMASK1 MODE1
0
0
$0033
Reserved
DMA Channel 0 Source
Read:
Address Register High) $0034 Write:
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
(D0SH)
Reset:
Indeterminate after Reset
DMA Channel 0 Source
Read:
Address Register Low $0035 Write:
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
(D0SL)
Reset:
Indeterminate after Reset
DMA Channel 0
Read:
Destination Address $0036 Write:
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
Register High (D0DH)
Reset:
Indeterminate after Reset
DMA Channel 0
Read:
Destination Address $0037 Write:
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
Register Low (D0DL)
Reset:
Indeterminate after Reset
= Unimplemented R = Reserved
Figure 2. I/O Register Summary (Continued)
MC68HC08XL36
30
Memory Map
For More Information On This Product,
Go to: www.freescale.com
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