ATMEGA8U2_14 Datasheet, PDF(59/310 Page) ATMEL Corporation – 125 Powerful Instructions – Most Single Clock Cycle Execution

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ATMEGA8U2_14 Datasheet, PDF (59/310 Pages) ATMEL Corporation – 125 Powerful Instructions – Most Single Clock Cycle Execution

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ATmega8U2/16U2/32U2

Table 10-3. Watchdog Timer Prescale Select, DIV = 0 (CLKwdt = CLK128 / 1) (Continued)

WDP3

1

1

1

1

1

1

WDP2

0

0

1

1

1

1

WDP1

1

1

0

0

1

1

WDP0

0

1

0

1

0

1

Number of WDT Oscillator

Cycles before 1st time-out

(Early warning)

Early warning Typical

Time-out at

VCC = 5.0V

Reserved

Watchdog

Reset/Interrupt Typical

Time-out at

VCC = 5.0V

Table 10-4. Watchdog Timer Prescale Select, DIV = 1 (CLKwdt = CLK128 / 3)

WDP3

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

WDP2

0

0

0

0

1

1

1

1

0

0

0

0

1

1

1

1

WDP1

0

0

1

1

0

0

1

1

0

0

1

1

0

0

1

1

WDP0

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

Number of WDT Oscillator

Cycles before 1st time-out

(Early warning)

2K (2048) cycles

4K (4096) cycles

8K (8192) cycles

16K (16384) cycles

32K (32768) cycles

64K (65536) cycles

128K (131072) cycles

256K (262144) cycles

512K (524288) cycles

1024K (1048576) cycles

Early warning Typical

Time-out at

VCC = 5.0V

48 ms

96 ms

192 ms

0.375 s

0.75 s

1.5 s

3s

6s

12 s

24 s

Reserved

Watchdog

Reset/Interrupt Typical

Time-out at

VCC = 5.0V

96 ms

192 ms

384 ms

0.75 s

1.5 s

3s

6s

12 s

24 s

48 s

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