ATMEGA8U2_14 Datasheet, PDF (189/310 Pages) ATMEL Corporation – 125 Powerful Instructions – Most Single Clock Cycle Execution

ATmega8U2/16U2/32U2
20.3.3
Design guidelines
The following design guidelines should be met:
• Serial resistors on USB Data lines must have 22 Ohms value (+/- 5%).
• Traces from the input USB receptacle (or from the cable connection in the case of a tethered
device) to the USB microcontroller pads should be as short as possible, and follow differential
traces routing rules (same length, as near as possible and avoid vias accumulation).
• Voltage transient / ESD suppressors may also be used to prevent USB pads to be damaged
by external disturbances.
• U_cap capacitor should be 1μF (+/- 10%) for correct operation.
In addition it is highly recommended to connect a 10μF capacitor to the VBUS line
20.4 General Operating Modes
20.4.1
Introduction
The USB controller is disabled and reset after a hardware reset generated by:
– Power on reset
– External reset
– Watchdog reset
– Brown out reset
– debugWIRE reset
– USB End Of Reset
In the case of USB End Of Reset (EOR), the USB controller is reset, but not disabled. Therefore
the device remains attached.
20.4.2
Power-on and reset
Figure 20-7 on page 189 illustrates the USB controller main states on power-on:
Figure 20-7. USB controller states after reset
Clock stopped
FRZCLK = 1
(macro off)
USBE = 1
Reset
USBE = 0
Any other
state
HW RESET
(except from EOR)
Device
USBE = 0
USBE = 0
HW RESET
(from EOR)
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