ATMEGA8U2_14 Datasheet, PDF (14/310 Pages) ATMEL Corporation – 125 Powerful Instructions – Most Single Clock Cycle Execution

ATmega8U2/16U2/32U2
CLI instruction. The following example shows how this can be used to avoid interrupts during the
timed EEPROM write sequence..
Assembly Code Example
in r16, SREG ; store SREG value
cli ; disable interrupts during timed sequence
sbi EECR, EEMPE ; start EEPROM write
sbi EECR, EEPE
out SREG, r16 ; restore SREG value (I-bit)
C Code Example
char cSREG;
cSREG = SREG; /* store SREG value */
/* disable interrupts during timed sequence */
__disable_interrupt();
EECR |= (1<<EEMPE); /* start EEPROM write */
EECR |= (1<<EEPE);
SREG = cSREG; /* restore SREG value (I-bit) */
When using the SEI instruction to enable interrupts, the instruction following SEI will be exe-
cuted before any pending interrupts, as shown in this example.
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