ATMEGA8U2_14 Datasheet, PDF (191/310 Pages) ATMEL Corporation – 125 Powerful Instructions – Most Single Clock Cycle Execution

ATmega8U2/16U2/32U2
Figure 20-10. USB Endpoint Interrupt vector sources
OVERFI
UESTAX.6
UNDERFI
UESTAX.5
NAKINI
UEINTX.6
NAKOUTI
UEINTX.4
RXSTPI
UEINTX.3
RXOUTI
UEINTX.2
STALLEDI
UEINTX.1
TXINI
UEINTX.0
FLERRE
UEIENX.7
NAKINE
UEIENX.6
TXSTPE
UEIENX.4
TXOUTE
UEIENX.3
RXOUTE
UEIENX.2
STALLEDE
UEIENX.1
TXINE
UEIENX.0
Endpoint 4
Endpoint 3
Endpoint 2
Endpoint 1
Endpoint 0
EPINT
UEINT.X
USB Endpoi
Interrupt Vec
Each endpoint has 8 interrupts sources associated with flags, and each source can be enabled
to trigger the corresponding endpoint interrupt.
If, for an endpoint, at least one of the sources is enabled to trigger interrupt, the corresponding
event(s) will make the program branch to the USB Endpoint Interrupt vector. The user may
determine the source (endpoint) of the interrupt by reading the “UDINT – USB Device Interrupt
Register” on page 210.
20.5 Power modes
20.5.1 Idle mode
In Idle mode, the CPU is halted (CPU clock stopped). The Idle mode is taken wether the USB
controller is running or not. The CPU can wake up on any USB interrupts.
20.5.2
Power-down
In Power-down mode, the oscillator is stopped and halts all the clocks (CPU and peripherals).
The USB controller wakes up when:
• the WAKEUPI interrupt is triggered (single asynchronous interrupt)
7799D–AVR–11/10
191