ATMEGA8U2_14 Datasheet, PDF (3/310 Pages) ATMEL Corporation – 125 Powerful Instructions – Most Single Clock Cycle Execution

ATmega8U2/16U2/32U2
2. Overview
The ATmega8U2/16U2/32U2 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture.
By executing powerful instructions in a single clock cycle, the ATmega8U2/16U2/32U2 achieves throughputs approaching
1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.
2.1 Block Diagram
Figure 2-1. Block Diagram
PD7 - PD0
PC7 - PC0
PB7 - PB0
PORTD DRIVERS
PORTC DRIVERS
PORTB DRIVERS
VCC
GND
DATA REGISTER
PORTD
DATA DIR.
REG. PORTD
DATA REGISTER
PORTC
DATA DIR.
REG. PORTC
DATA REGISTER
PORTB
8-BIT DA TA BUS
DATA DIR.
REG. PORTB
Debug-Wire
POR - BOD
RESET
PROGRAM
COUNTER
STACK
POINTER
INTERNAL
OSCILLATOR
WATCHDOG
TIMER
CALIB. OSC
OSCILLATOR
ON-CHIP DEBUG
PROGRAM
FLASH
SRAM
MCU CONTROL
REGISTER
TIMING AND
CONTROL
PROGRAMMING
LOGIC
INSTRUCTION
REGISTER
INSTRUCTION
DECODER
CONTROL
LINES
USART1
SPI
GENERAL
PURPOSE
REGISTERS
X
Y
Z
ALU
STATUS
REGISTER
TIMER/
COUNTERS
INTERRUPT
UNIT
EEPROM
PLL
USB
PS/2
ON-CHIP
3.3V
REGULATOR
UVcc
UCap
1uF
D+/SCK
D-/SDATA
7799E–AVR–09/2012
The AVR core combines a rich instruction set with 32 general purpose working registers. All the
32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction executed in one clock cycle. The resulting
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