ATMEGA8U2_14 Datasheet, PDF (174/310 Pages) ATMEL Corporation – 125 Powerful Instructions – Most Single Clock Cycle Execution

ATmega8U2/16U2/32U2
Table 18-11. Examples of UBRRn Settings for Commonly Used Oscillator Frequencies (Continued)
Baud
Rate
(bps)
f_osc = 8.0000 MHz
U2Xn = 0
U2Xn = 1
UBRR Error UBRR Error
f_osc = 11.0592 MHz
U2Xn = 0
U2Xn = 1
UBRR Error UBRR Error
f_osc = 14.7456 MHz
U2Xn = 0
U2Xn = 1
UBRR Error UBRR Error
2400
207
0.2%
416
-0.1% 287
0.0%
575
0.0%
383
0.0%
767
0.0%
4800
103
0.2%
207
0.2%
143
0.0%
287
0.0%
191
0.0%
383
0.0%
9600
51
0.2%
103
0.2%
71
0.0%
143
0.0%
95
0.0%
191
0.0%
14.4k
34
-0.8%
68
0.6%
47
0.0%
95
0.0%
63
0.0%
127
0.0%
19.2k
25
0.2%
51
0.2%
35
0.0%
71
0.0%
47
0.0%
95
0.0%
28.8k
16
2.1%
34
-0.8%
23
0.0%
47
0.0%
31
0.0%
63
0.0%
38.4k
12
0.2%
25
0.2%
17
0.0%
35
0.0%
23
0.0%
47
0.0%
57.6k
8
-3.5%
16
2.1%
11
0.0%
23
0.0%
15
0.0%
31
0.0%
76.8k
6
-7.0%
12
0.2%
8
0.0%
17
0.0%
11
0.0%
23
0.0%
115.2k
3
8.5%
8
-3.5%
5
0.0%
11
0.0%
7
0.0%
15
0.0%
230.4k
1
8.5%
3
8.5%
2
0.0%
5
0.0%
3
0.0%
7
0.0%
250k
1
0.0%
3
0.0%
2
-7.8%
5
-7.8%
3
-7.8%
6
5.3%
0.5M
0
0.0%
1
0.0%
–
–
2
-7.8%
1
-7.8%
3
-7.8%
1M
Max. ⁽¹⁾
–
–
0.5 Mbps
0
0.0%
1 Mbps
–
–
691.2 kbps
–
–
1.3824 Mbps
0
-7.8%
921.6 kbps
1
-7.8%
1.8432 Mbps
1.
UBRR = 0, Error = 0.0%
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