ATMEGA8U2_14 Datasheet, PDF (172/310 Pages) ATMEL Corporation – 125 Powerful Instructions – Most Single Clock Cycle Execution

ATmega8U2/16U2/32U2
Table 18-9. Examples of UBRRn Settings for Commonly Used Oscillator Frequencies
Baud
Rate
(bps)
f_osc = 1.0000 MHz
U2Xn = 0
U2Xn = 1
UBRR Error UBRR Error
f_osc = 1.8432 MHz
U2Xn = 0
U2Xn = 1
UBRR Error UBRR Error
f_osc = 2.0000 MHz
U2Xn = 0
U2Xn = 1
UBRR Error UBRR Error
2400
25
0.2%
51
0.2%
47
0.0%
95
0.0%
51
0.2%
103
0.2%
4800
12
0.2%
25
0.2%
23
0.0%
47
0.0%
25
0.2%
51
0.2%
9600
6
-7.0%
12
0.2%
11
0.0%
23
0.0%
12
0.2%
25
0.2%
14.4k
3
8.5%
8
-3.5%
7
0.0%
15
0.0%
8
-3.5%
16
2.1%
19.2k
2
8.5%
6
-7.0%
5
0.0%
11
0.0%
6
-7.0%
12
0.2%
28.8k
1
8.5%
3
8.5%
3
0.0%
7
0.0%
3
8.5%
8
-3.5%
38.4k
1
-18.6%
2
8.5%
2
0.0%
5
0.0%
2
8.5%
6
-7.0%
57.6k
0
8.5%
1
8.5%
1
0.0%
3
0.0%
1
8.5%
3
8.5%
76.8k
–
–
1
-18.6%
1
-25.0%
2
0.0%
1
-18.6%
2
8.5%
115.2k
–
–
0
8.5%
0
0.0%
1
0.0%
0
8.5%
1
8.5%
230.4k
–
–
–
–
–
–
0
0.0%
–
–
–
–
250k
Max. ⁽¹⁾
–
–
62.5 kbps
–
–
125 kbps
–
–
115.2 kbps
–
–
230.4 kbps
–
–
125 kbps
0
0.0%
250 kbps
1.
UBRR = 0, Error = 0.0%
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