ATMEGA8U2_14 Datasheet, PDF (267/310 Pages) ATMEL Corporation – 125 Powerful Instructions – Most Single Clock Cycle Execution

ATmega8U2/16U2/32U2
26.4.3 External Clock Drive
Table 26-2. External Clock Drive
Symbol
1/t_CLCL
t_CLCL
t_CHCX
t_CLCX
t_CLCH
t_CHCL
t_CLCL
Parameter
Oscillator Frequency
Clock Period
High Time
Low Time
Rise Time
Fall Time
Change in period from
one clock cycle to the
next
V_CC=2.7-5.5V
Min.
Max.
0
8
125
50
50
1.6
1.6
2
V_CC=4.5-5.5V
Min.
Max.
0
16
62.5
25
25
0.5
0.5
2
Units
MHz
ns
ns
ns
s
s
%
Note:
All DC Characteristics contained in this datasheet are based on simulation and characterization of
other AVR microcontrollers manufactured in the same process technology. These values are pre-
liminary values representing design targets, and will be updated after characterization of actual
silicon.
26.5 System and Reset Characteristics
Table 26-3. Reset, Brown-out and Internal Voltage Reference Characteristics
Symbol
Parameter
Condition
Min Typ Max Units
V_POT
Power-on Reset Threshold Voltage (rising)
Power-on Reset Threshold Voltage (falling)^(Note:)
1.4
2.3
V
1.3
2.3
V
V_POR
V_CC Start Voltage to ensure internal Power-on Reset signal
-0.1
0.1
V
V_CCRR
V_CC Rise Rate to ensure internal Power_on Reset signal
0.3
V/ms
t_RST
Minimum pulse width on RESET Pin
5V, 25°C
400
ns
V_HYST
Brown-out Detector Hysteresis
50
mV
t_BOD
Min Pulse Width on Brown-out Reset
ns
V_BG
Bandgap reference voltage
V_CC = 2.7V -
5.5V
1.0
1.1
1.2
V
t_BG
Bandgap reference start-up time
-
I_BG
Bandgap reference current consumption
-
Note: The POR will not work unless the supply voltage has been below VPOT (falling)
40
70
μs
10
μA
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