ATMEGA8U2_14 Datasheet, PDF (105/310 Pages) ATMEL Corporation – 125 Powerful Instructions – Most Single Clock Cycle Execution

ATmega8U2/16U2/32U2
15.9.2 TCCR0B – Timer/Counter Control Register B
Bit
7
6
5
0x25 (0x45)
FOC0A FOC0B
–
Read/Write
W
W
R
Initial Value
0
0
0
4
3
2
1
0
–
WGM02 CS02
CS01
CS00 TCCR0B
R
R/W
R/W
R/W
R/W
0
0
0
0
0
• Bit 7 – FOC0A: Force Output Compare A
The FOC0A bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR0B is written when operating in PWM mode. When writing a logical one to the FOC0A bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC0A output is
changed according to its COM0A1:0 bits setting. Note that the FOC0A bit is implemented as a
strobe. Therefore it is the value present in the COM0A1:0 bits that determines the effect of the
forced compare.
A FOC0A strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR0A as TOP.
The FOC0A bit is always read as zero.
• Bit 6 – FOC0B: Force Output Compare B
The FOC0B bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR0B is written when operating in PWM mode. When writing a logical one to the FOC0B bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC0B output is
changed according to its COM0B[1:0] bits setting. Note that the FOC0B bit is implemented as a
strobe. Therefore it is the value present in the COM0B[1:0] bits that determines the effect of the
forced compare.
A FOC0B strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR0B as TOP.
The FOC0B bit is always read as zero.
• Bits 5:4 – Res: Reserved Bits
These bits are reserved bits and will always read as zero.
• Bit 3 – WGM02: Waveform Generation Mode
See the description in the “TCCR0A – Timer/Counter Control Register A” on page 102.
• Bits 2:0 – CS0[2:0]: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter.
Table 15-9. Clock Select Bit Description
CS02 CS01 CS00 Description
0
0
0
No clock source (Timer/Counter stopped)
0
0
1
clk_I/O/(No prescaling)
0
1
0
clk_I/O/8 (From prescaler)
0
1
1
clk_I/O/64 (From prescaler)
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