ATMEGA8U2_14 Datasheet, PDF (250/310 Pages) ATMEL Corporation – 125 Powerful Instructions – Most Single Clock Cycle Execution

ATmega8U2/16U2/32U2
25.6
Parallel Programming Parameters, Pin Mapping, and Commands
This section describes how to parallel program and verify Flash Program memory, EEPROM
Data memory, Memory Lock bits, and Fuse bits in the ATmega8U2/16U2/32U2. Pulses are
assumed to be at least 250 ns unless otherwise noted.
25.6.1
Signal Names
In this section, some pins of the ATmega8U2/16U2/32U2 are referenced by signal names
describing their functionality during parallel programming, see Figure 25-1 and Table 25-9. Pins
not described in the following table are referenced by pin names.
The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a positive pulse.
The bit coding is shown in Table 25-12.
When pulsing WR or OE, the command loaded determines the action executed. The different
commands are shown in Table 25-13.
Figure 25-1. Parallel Programming⁽¹⁾
RDY/BSY
OE
WR
BS1
XA0
XA1
PAGEL
+12 V
BS2
PD1
PD2
PD3
PD4
PD5
PD6
PD7
RESET
PC6
XTAL1
GND
VCC
AVCC
+5V
+5V
PB7:0
DATA
Note: 1. Unused Pins should be left floating.
Table 25-9. Pin Name Mapping
Signal Name in
Programming Mode
Pin Name
RDY/BSY
PD1
OE
PD2
WR
PD3
BS1
PD4
XA0
PD5
XA1
PD6
I/O Function
O
0: Device is busy programming, 1: Device is ready for
new command.
I Output Enable (Active low).
I Write Pulse (Active low).
I Byte Select 1.
I XTAL Action Bit 0
I XTAL Action Bit 1
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