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C509-L_97 Datasheet, PDF (95/290 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller
On-Chip Peripheral Components
C509-L
6.1.3.2 Port Loading and Interfacing
The output buffers of ports 1 to 6 and 9 can drive TTL inputs directly. The maximum port load which
still guarantees correct logic output levels can be looked up in the C509-L DC characteristics in
chapter 11 or in the data sheet. The corresponding parameters are VOL and VOH.
The same applies to port 0 output buffers. They do, however, require external pullups to drive
floating inputs, except when being used as the address/data bus.
When used as inputs it must be noted that the ports 1 to 6 and 9 are not floating but have internal
pullup transistors. The driving devices must be capable of sinking a sufficient current if a logic low
level shall be applied to the port pin (the parameters ITL and IIL in the C509-L DC characteristics
specify these currents). Port 0 has floating inputs when used for digital input.
6.1.3.3 Read-Modify-Write Feature of Ports 1 to 6 and 9
Some port-reading instructions read the latch and others read the pin. The instructions reading the
latch rather than the pin read a value, possibly change it, and then rewrite it to the latch. These are
called “read-modify-write”- instructions, which are listed in table 6-2. If the destination is a port or a
port pin, these instructions read the latch rather than the pin. Note that all other instructions which
can be used to read a port, exclusively read the port pin. In any case, reading from latch or pin,
resp., is performed by reading the SFRs P0, P1, P2 and P3; for example, “MOV A, P3” reads the
value from port 3 pins, while “ANL P3, #0AAH” reads from the latch, modifies the value and writes
it back to the latch.
It is not obvious that the last three instructions in table 6-2 are read-modify-write instructions, but
they are. The reason is that they read the port byte, all 8 bits, modify the addressed bit, then write
the complete byte back to the latch.
Table 6-2 : “Read-Modify-Write”- Instructions
Instruction
ANL
ORL
XRL
JBC
CPL
INC
DEC
DJNZ
MOV Px.y,C
CLR Px.y
SETB Px.y
Function
Logic AND; e.g. ANL P1, A
Logic OR; e.g. ORL P2, A
Logic exclusive OR; e.g. XRL P3, A
Jump if bit is set and clear bit; e.g. JBC P1.1, LABEL
Complement bit; e.g. CPL P3.0
Increment byte; e.g. INC P1
Decrement byte; e.g. DEC P1
Decrement and jump if not zero; e.g. DJNZ P3, LABEL
Move carry bit to bit y of port x
Clear bit y of port x
Set bit y of port x
Semiconductor Group
6-17
1997-10-01