C509-L_97 Datasheet, PDF (28/290 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

Memory Organization
C509-L
Reset initializes the stack pointer to location 07H and increments it once to start from location 08H
which is also the first register (R0) of register bank 1. Thus, if one is going to use more than one
register bank, the SP should be initialized to a different location of the RAM which is not used for
data storage.
3.4 Program and Data Memory Organization
The C509-L can operate in four different operating modes (chipmodes) with different program and
data memory organizations:
– Normal Mode
– XRAM Mode
– Bootstrap Mode
– Programming Mode
Table 3-1 describes the program and data memory areas which are available in the different
chipmodes of the C509-L. It also shows the control bits of SFR SYSCON1, which are used for the
software selection of the chipmodes.
Table 3-1
Overview of Program and Data Memory Organization
Operating Mode
(Chipmode)
Program Memory
Ext.
Int.
Data Memory
Ext.
Int.
Normal Mode
XRAM Mode
0000H -
FFFFH
0200H -
F3FFH
Bootstrap Mode
0200H -
F3FFH
Programming Mode 0200H -
FFFFH
–
0000H -
01FFH =
Boot ROM;
F400H -
FFFFH =
(XRAM)
0000H -
01FFH =
Boot ROM
0000H -
01FFH =
Boot ROM;
F400H -
FFFFH =
XRAM
0000H -
F3FFH
0000H -
FFFFH
(read only)
0000H -
F3FFH
0000H -
FFFFH
(read and
write)
F400H -
FFFFH
(XRAM)
–
F400H -
FFFFH
(XRAM)
–
SYSCON1 Bits
PRGEN SWAP
1
0
0
0
1
1
0
1
1
Semiconductor Group
3-3
1997-10-01