C509-L_97 Datasheet, PDF (40/290 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

Memory Organization
C509-L
3.4.7.3 Switching of the SWAP-Bit
Setting or clearing the SWAP-bit in SYSCON1 will change code memory and data memory
assignment. To assure a well defined behavior of the controller, it is necessary to perform a specific
code sequence by the user. Any write access to SYSCON1 which changes the SWAP bit has to be
followed by a 2-cycle instruction. This 2-cycle instruction will be the last instruction, which is
performed by the CPU in the former code memory. For that reason, this 2-cycle instruction has to
be a LJMP-instruction which specifies the new address for the program counter. The next
instruction, which will be performed by the CPU is at the specified destination address of the JMP
instruction in the former data memory (which now has become to code memory).
Figure 3-8 gives an overview about the behavior of the external pin PSEN/RDF and RD/PSENX
when chipmodes with different SWAP bits are switched. These signals change their functions
depending on the value of the SWAP bit.
Figure 3-8
Switching of the SWAP Bit
Figure 3-8 a): When the SWAP bit is set, the “program store enable” function of the PSEN/RDF pin,
which is connected to OE (output enable) of the FLASH/ROM/EPROM memory, is switched to the
RD/PSENX pin. The “read enable” function of the RD/PSENX pin, which is connected to the RD
(“read“) input of an external SRAM memory, is switched to the PSEN/RDF signal. PSEN/RDF
becomes now active during MOVX instructions.
When the SWAP bit is cleared, the “read enable” function (MOVX instructions) of the PSEN/RDF
pin, which is connected to OE (output enable) of the FLASH/ROM/EPROM memory, is switched to
the RD/PSENX pin. The “program store enable” function of the RD/PSENX pin, which is connected
to the RD (“read“) input of the external SRAM memory, is switched to the PSEN/RDF pin. RD/
PSENX becomes now active during MOVX instructions.
Semiconductor Group
3-15
1997-10-01