C509-L_97 Datasheet, PDF (81/290 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

On-Chip Peripheral Components
C509-L
The shaded area in figure 6-1 shows the control logic in the C509-L, which has been added to the
functionality of the standard 8051 digital I/O port structure. This control logic is used to provide an
additional bidirectional port structure with CMOS voltage levels.
6.1.1.1 Port Structure Selection
After a reset operation of the C509-L, the quasi-bidirectional 8051-compatible port structure is
selected. For selection of the bidirectional port structure (CMOS) the bit PMOD of SFR SYSCON
must be set. Because each port pin can be programmed as an input or an output, additionally, after
the selection of the bidirectional mode the direction register of the ports must be written (except the
analog/digital input ports 7,8). This direction registers are mapped to the port registers. This means,
the port register address is equal to its direction register address. Figure 6-2 illustrates the port-
and direction register configuration.
Figure 6-2
Port Register, Direction Register
For the access the direction registers a double instruction sequence must be executed. The first
instruction has to set bit PDIR in SFR IP1. Thereafter, a second instruction can read or write the
direction registers. PDIR will automatically be cleared after the second machine cycle (S2P2) after
having been set. For this time, the access to the direction register is enabled and the register can
be read or written. Further, the double instruction sequence as shown in figure 6-2, cannot be
interrupted by an interrupt,
When the bidirectional port structure is activated (PMOD=1) after a reset, the ports are defined as
inputs (direction registers default values after reset are set to FFH).
With PMOD = 0 (quasi-bidirectional port structure selected), any access to the direction registers
has no effect on the port driver circuitries.
Semiconductor Group
6-3
1997-10-01