C509-L_97 Datasheet, PDF (110/290 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

On-Chip Peripheral Components
C509-L
Table 6-4
Special Function Register of the CCU
Symbol
Description
CMSEL
CAFR
CRCH
CRCL
COMSETL
COMSETH
COMCLRL
COMCLRH
SETMSK
CLRMSK
CTCON
CTRELH
CTRELL
CT1RELH
CT1RELL
TH2
TL2
T2CON
CT1CON
PRSC
Compare Input Select
Capture 1, Falling/Rising Edge Register
Comp./Rel./Capt. Reg. High Byte
Comp./Rel./Capt. Reg. Low Byte
Compare Set Register, Low Byte
Compare Set Register, High Byte
Compare Clear Register, Low Byte
Compare Clear Register, High Byte
Compare Set Mask Register
Compare Clear Mask Register
Compare Timer Control Register
Compare Timer Rel. Reg., High Byte
Compare Timer Rel. Reg., Low Byte
Compare Timer 1 Rel. Reg., High Byte
Compare Timer 1 Rel. Reg., Low Byte
Timer 2, High Byte
Timer 2, Low Byte
Timer 2 Control Register
Compare Timer 1 Control Register
Prescaler Control Register
Address with
RMAP=0 RMAP=1
F7H
–
CBH
CAH
A1H
A2H
A3H
A4H
A5H
A6H
E1H
DFH
DEH
–
–
CDH
CCH
C8H
BCH
B4H
–
F7H
–
–
–
–
–
–
–
–
–
–
–
DFH
DEH
–
–
–
–
–
The compare/capture registers and reload registers related to compare timer 1 are mapped to the
registers of the compare timer. This means, that they have the same register address. These
compare timer 1 related registers are selected when bit RMAP, which located in the SFR SYSCON,
is set during a register access. If RMAP=0, the compare timer related register are accessed. The
rightmost 2 columns of table 6-4 show the SFR address of each CCU register with the state of bit
RMAP when they are accessed (RMAP description see also chapter 3.5).
Semiconductor Group
6-32
1997-10-01