C509-L_97 Datasheet, PDF (41/290 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

Memory Organization
C509-L
3.4.8 Watchdog Timer - Behaviour in the Different Operating Modes
This section describes the chipmode specific behavior of the watchdog timer unit. Further details
about the watchdog timer are given in chapter 8.
Normal Mode:
The watchdog timer function in Normal Mode is not restricted.
XRAM Mode:
To avoid deadlocks during program execution in the XRAM, the once enabled watchdog timer
keeps on running but the refresh is inhibited. A refresh sequence of a previously enabled watchdog
timer is not permitted. An unintentional refresh sequence in the XRAM mode does not reload the
watchdog timer and an internally generated watchdog reset will be executed at the watchdog
counter state 7FFCH. The watchdog timer reset generation is enabled.
For refreshing the watchdog timer, the user has to leave the XRAM Mode and must enter the
Normal Mode by clearing the SWAP bit followed by a LJMP or LCALL to “startaddress of watchdog
timer refresh” in the external ROM/EPROM. In the normal mode the watchdog timer refresh can be
executed successfully. If required, XRAM Mode can again be entered after the watchdog timer
refresh operation has been finished.
Bootstrap Mode and Programming Mode
In the Bootstrap Mode and in the Programming Mode the watchdog timer increment is inhibited. In
this way, programming the external FLASH EPROM in Programming Mode cannot be aborted by
the watchdog timer.
Semiconductor Group
3-16
1997-10-01