C509-L_97 Datasheet, PDF (58/290 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

External Bus Interface
C509-L
4.3 Eight Datapointers for Faster External Bus Access
4.3.1 The Importance of Additional Datapointers
The standard 8051 architecture provides just one 16-bit pointer for indirect addressing of external
devices (memories, peripherals, latches, etc.). Except for a 16-bit “move immediate” to this
datapointer and an increment instruction, any other pointer handling is to be handled bytewise. For
complex applications with peripherals located in the external data memory space (e.g. CAN
controller) or extended data storage capacity this turned out to be a “bottle neck” for the 8051’s
communication to the external world. Especially programming in high-level languages (PLM51,
C51, PASCAL51) requires extended RAM capacity and at the same time a fast access to this
additional RAM because of the reduced code efficiency of these languages.
4.3.2 How the Eight Datapointers of the C509-L are Realized
Simply adding more datapointers is not suitable because of the need to keep up 100% compatibility
to the 8051 instruction set. This instruction set, however, allows the handling of only one single 16-
bit datapointer (DPTR, consisting of the two 8-bit SFRs DPH and DPL).
To meet both of the above requirements (speed up external accesses, 100% compatibility to 8051
architecture) the C509-L contains a set of eight 16-bit registers from which the actual datapointer
can be selected.
This means that the user’s program may keep up to eight 16-bit addresses resident in these
registers, but only one register at a time is selected to be the datapointer. Thus the datapointer in
turn is accessed (or selected) via indirect addressing. This indirect addressing is done through a
special function register called DPSEL (data pointer select register). All instructions of the C509-L
which handle the datapointer therefore affect only one of the eight pointers which is addressed by
DPSEL at that very moment.
Figure 4-3 illustrates the addressing mechanism: a 3-bit field in register DPSEL points to the
currently used DPTRx. Any standard 8051 instruction (e.g. MOVX @DPTR, A - transfer a byte from
accumulator to an external location addressed by DPTR) now uses this activated DPTRx.
Special Function Register DPSEL (Address 92H)
Bit No. MSB
7
6
5
4
3
92H
–
–
–
–
–
Reset Value : XXXXX000B
LSB
2
1
0
.2
.1
.0 ^DPSEL
Bit
–
DPSEL.2-0
Function
Reserved bits for future use.
Data pointer select bits
DPSEL.2-0 defines the number of the actual active data pointer.DPTR0-7.
Semiconductor Group
4-6
1997-10-01