C509-L_97 Datasheet, PDF (121/290 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

On-Chip Peripheral Components
C509-L
The compare timers are, once started, free-running 16-bit timers, which on overflow are
automatically reloaded by the contents of the 16-bit reload registers. These reload registers are
CTRELL (compare timer reload register, low byte) and CTRELH (compare timer reload register,
high byte) and the corresponding registers of the compare timer 1 (CTR1RELH, CT1RELH). An
initial writing to the reload register CTRELL/CT1RELL starts the corresponding compare timer. If a
compare timer is already running, a write to CTRELL/CT1RELL again triggers an instantly reload of
the timer, in other words loads the timer in the cycle following the write instruction with the new count
stored in the reload registers CTREL or CT1REL.
When the reload register is to be loaded with a 16-bit value, the high byte of the reload register must
be written first to ensure a determined start or restart position. Writing to the low byte then triggers
the actual reload procedure mentioned above. The 16-bit reload value can be overwritten at any
time.
The compare timer have - as any other timer in the C509-L - their own interrupt request flags CTF
and CT1F. These flags are located in the registers CTCON and CT1CON. CTF/CT1F are set when
the timer count rolls over from all ones to the reload value. They are reset by hardware when the
compare timer value is no more equal to the reload value.
The overflow interrupt eases e.g. software control of pulse width modulated output signals. A
periodic interrupt service routine caused by an overflow of the compare timer can be used to load
new values in the assigned compare registers and thus change the corresponding PWM output
accordingly. More details about interrupt control are discussed in chapter 7.
Semiconductor Group
6-43
1997-10-01