C509-L_97 Datasheet, PDF (117/290 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

On-Chip Peripheral Components
C509-L
6.3.2 Operation of the Compare Timers
These two timers - the fourth and fifth timer in the C509-L - are implemented to function as a fast
16-bit time base for the compare registers CM0 to CM7 and CC10 to CC17. The compare timers
are combined with the CMx/CC1x registers and can be used for high-speed output purposes or as
a fast 16-bit pulse-width modulation unit.
Prior to the description of the compare timer operating modes and functions, the compare timer
related special function registers are described.
6.3.2.1 Compare Timer and Compare Timer 1 Registers
Each of the two compare timers has a 8-bit control register and a 16-bit reload register. These 6
special function registers are described in this section.
Special Function Register CTCON (Address E1H)
Special Function Register CT1CON (Address BCH)
Reset Value : 01000000B
Reset Value : X1XX0000B
MSB
LSB
Bit No. 7
6
5
4
3
2
1
0
E1H T2PS1 CTP ICR ICS CTF CLK2 CLK1 CLK0 CTCON
BCH
7
6
5
– CT1P –
4
3
2
1
0
– CT1F CLK12 CLK11 CLK10 CT1CON
The shaded bits are not used for compare timer control.
Bit
Function
ICR
Interrupt request flag for compare register COMCLR
ICR is set when a compare match occurred. ICR is cleared by hardware
when the processor vectors to interrupt routine.
ICS
Interrupt request flag for compare register COMSET
ICS is set when a compare match occurred. ICS is cleared by hardware
when the processor vectors to interrupt routine.
CTF
Compare timer overflow flag
CTF is set when the compare timer 1 count rolls over from all ones to the
reload value. When CTF is set, a compare timer interrupt can be
generated (if enabled). CTF is cleared by hardware when the compare
timer value is no more equal to the reload value.
Semiconductor Group
6-39
1997-10-01