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C509-L_97 Datasheet, PDF (118/290 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller
Bit
CTP
CLK2
CLK1
CLK0
CT1P
CLK12
CLK11
CLK10
CT1F
On-Chip Peripheral Components
C509-L
Function
Compare timer input clock selection.
Based on fOSC these bits define the prescaler divider ratio of the compare
timer input clock according to the following table
CLK2
CLK1
CLK0
Compare Timer
Input Clock
CTP = 0
0
0
0
fOSC
0
0
1
fOSC ÷ 2
0
1
0
fOSC ÷ 4
0
1
1
fOSC ÷ 8
1
0
0
fOSC ÷ 16
1
0
1
fOSC ÷ 32
1
1
0
fOSC ÷ 64
1
1
1
fOSC ÷ 128
Compare Timer
Input Clock
CTP = 1
(default after reset)
fOSC ÷ 2
fOSC ÷ 4
fOSC ÷ 8
fOSC ÷ 16
fOSC ÷ 32
fOSC ÷ 64
fOSC ÷ 128
fOSC ÷ 256
Compare timer 1 input clock selection.
Based on fOSC these bits define the prescaler divider ratio of the compare
timer 1 input clock according to the following table
Compare Timer 1 Compare Timer 1
CLK12 CLK11 CLK10 Input Clock
Input Clock
CT1P = 0
CT1P = 1
0
0
0
fOSC
0
0
1
fOSC ÷ 2
0
1
0
fOSC ÷ 4
0
1
1
fOSC ÷ 8
1
0
0
fOSC ÷ 16
1
0
1
fOSC ÷ 32
1
1
0
fOSC ÷ 64
1
1
1
fOSC ÷ 128
fOSC ÷ 2
fOSC ÷ 4
fOSC ÷ 8
fOSC ÷ 16
fOSC ÷ 32
fOSC ÷ 64
fOSC ÷ 128
fOSC ÷ 256
Compare timer 1 overflow flag
CT1F is set when the compare timer 1 count rolls over from all ones to
the reload value. When CT1F is set, a compare timer 1 interrupt can be
generated (if enabled). CT1F is cleared by hardware when the compare
timer 1 value is no more equal its reload value.
Semiconductor Group
6-40
1997-10-01