C509-L_97 Datasheet, PDF (213/290 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

Interrupt System
C509-L
7.3 Interrupt Priority Level Structure
The 19 interrupt sources of the C509-L are combined in six groups. Table 7-1 lists the structure of
these interrupt groups.
Table 7-1
Interrupt Source Structure
Interrupt
Groups
1
2
3
4
5
6
Associated Interrupts
External interrupt 0 Serial channel 1 A/D converter
--
interrupt
interrupt
Timer 0 overflow --
External interrupt 2 --
External interrupt 1 Match in CM0-CM7 External interrupt 3 Match in CC10-
CC17 or capture
event at port 9
Timer 1 overflow
Compare timer
overflow
External interrupt 4 Compare timer 1
overflow
Serial channel 0
interrupt
Match in COMSET External interrupt 5 --
Timer 2 overflow or Match in COMCLR External interrupt 6 --
external reload
interrupt
Each group of interrupt sources can be programmed individually to one of four priority levels by
setting or clearing one bit in the special function register IP0 and one in IP1. A low-priority interrupt
can itself be interrupted by a high-priority interrupt, but not by another interrupt of the same or a
lower priority. An interrupt of the highest priority level cannot be interrupted by another interrupt
source.
lf two or more requests of different priority levels are received simultaneously, the request of the
highest priority is serviced first. lf requests of the same priority level are received simultaneously,
an internal polling sequence determines which request is to be serviced first. Thus, within each
priority level there is a second priority structure determined by the polling sequence (table 7-2).
Semiconductor Group
7-17
1997-10-01