C509-L_97 Datasheet, PDF (219/290 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

Fail Save Mechanisms
C509-L
8 Fail Save Mechanisms
The C509-L offers two on-chip peripherals which monitor the program flow and ensure an automatic
“fail-safe” reaction for cases where the controller’s hardware fails or the software hangs up:
– A programmable watchdog timer (WDT) with variable time-out period from 189 microseconds
up to approx. 0.79 seconds at 16 MHz.
– An oscillator watchdog (OWD) which monitors the on-chip oscillator and forces the
microcontroller into the reset state if the on-chip oscillator fails.
8.1 Programmable Watchdog Timer
To protect the system against software upset, the user’s program has to clear this watchdog within
a previously programmed time period. lf the software fails to do this periodical refresh of the
watchdog timer, an internal hardware reset will be initiated. The software can be designed so that
the watchdog times out if the program does not work properly. lt also times out if a software error is
based on hardware-related problems.
The watchdog timer in the C509-L is a 15-bit timer, which is incremented by a count rate of f_OSC/12
up to f_OSC/384. For programming of the watchdog timer overflow rate, the upper 7 bit of the watchdog
timer can be written. Figure 8-1 shows the block diagram of the watchdog timer unit.
Figure 8-1
Block Diagram of the Programmable Watchdog Timer
Semiconductor Group
8-1
1997-10-01