C509-L_97 Datasheet, PDF (31/290 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

Memory Organization
C509-L
3.4.3 XRAM Mode Configuration
The XRAM Mode is implemented in the C509-L for executing e.g. up to 3K byte diagnostic software
which has been loaded into the XRAM in the Bootstrap Mode via the serial interface. In this
operating mode the Boot ROM, the XRAM, and the external data memory are mapped into the code
memory area, while the external ROM/EPROM is mapped into the external data memory area.
External program memory fetches from the SRAM are controlled by the P3.7/RD/PSENX pin.
External data memory read accesses from the ROM/EPROM are controlled by the PSEN/RDF pin.
In XRAM mode, the external data memory can only be read but not written.
The XRAM mode is entered by setting the SWAP bit, while the PRGEN pin (PRGEN1 bit) is kept
low. The locations of the code- and data-memory in the XRAM mode are shown in figure 3-4.
Figure 3-4
Locations of Code- and Data Memory in XRAM Mode
Notes:
In the XRAM mode, programming of the external FLASH EPROM is not possible because
the PRGEN pin (PRGEN1 bit) is at logic low level (HW-protection).
The internal XRAM is selected automatically in the code memory, if the SWAP bit is set.
When leaving the XRAM Mode, the XRAM is disabled (only if the XMAP0 bit was not
cleared by software before).
Semiconductor Group
3-6
1997-10-01