MC908AZ60ACFUER Datasheet, PDF (92/414 Pages) Freescale Semiconductor, Inc – To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to:

EEPROM-2 Memory
7.5 EEPROM-2 Register Descriptions
Four I/O registers and three nonvolatile registers control program, erase and options of the EEPROM-2
array.
7.5.1 EEPROM-2 Control Register
This read/write register controls programming/erasing of the array.
Address: $FF7D
Bit 7
Read:
UNUSED
Write:
Reset: 0
6
5
0
EEOFF
0
0
= Unimplemented
4
3
EERAS1 EERAS0
0
0
2
EELAT
0
1
AUTO
0
Figure 7-2. EEPROM-2 Control Register (EE2CR)
Bit 0
EEPGM
0
Bit 7— Unused bit
This read/write bit is software programmable but has no functionality.
EEOFF — EEPROM-2 power down
This read/write bit disables the EEPROM-2 module for lower power consumption. Any attempts to
access the array will give unpredictable results. Reset clears this bit.
1 = Disable EEPROM-2 array
0 = Enable EEPROM-2 array
EERAS1 and EERAS0 — Erase/Program Mode Select Bits
These read/write bits set the erase modes. Reset clears these bits.
Table 7-3. EEPROM-2 Program/Erase Mode Select
EEBPx
0
0
0
0
1
X = don’t care
EERAS1
0
0
1
1
X
EERAS0
0
1
0
1
X
MODE
Byte Program
Byte Erase
Block Erase
Bulk Erase
No Erase/Program
EELAT — EEPROM-2 Latch Control
This read/write bit latches the address and data buses for programming the EEPROM-2 array. EELAT
cannot be cleared if EEPGM is still set. Reset clears this bit.
1 = Buses configured for EEPROM-2 programming or erase operation
0 = Buses configured for normal operation
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
92
Freescale Semiconductor