MC908AZ60ACFUER Datasheet, PDF (246/414 Pages) Freescale Semiconductor, Inc – To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to:

Programmable Interrupt Timer (PIT)
Address: $004B
Bit 7
6
5
4
3
2
1
Bit 0
Read: POF
0
0
POIE PSTOP
PPS2
PPS1
PPS0
Write: 0
PRST
Reset: 0
0
1
0
0
0
0
0
= Unimplemented
Figure 21-3. PIT Status and Control Register (PSC)
POF — PIT Overflow Flag Bit
This read/write flag is set when the PIT counter reaches the modulo value programmed in the PIT
counter modulo registers. Clear POF by reading the PIT status and control register when POF is set
and then writing a 0 to POF. If another PIT overflow occurs before the clearing sequence is complete,
then writing 0 to POF has no effect. Therefore, a POF interrupt request cannot be lost due to
inadvertent clearing of POF. Reset clears the POF bit. Writing a 1 to POF has no effect.
1 = PIT counter has reached modulo value
0 = PIT counter has not reached modulo value
POIE — PIT Overflow Interrupt Enable Bit
This read/write bit enables PIT overflow interrupts when the POF bit becomes set. Reset clears the
POIE bit.
1 = PIT overflow interrupts enabled
0 = PIT overflow interrupts disabled
PSTOP — PIT Stop Bit
This read/write bit stops the PIT counter. Counting resumes when PSTOP is cleared. Reset sets the
PSTOP bit, stopping the PIT counter until software clears the PSTOP bit.
1 = PIT counter stopped
0 = PIT counter active
NOTE
Do not set the PSTOP bit before entering wait mode if the PIT is required
to exit wait mode.
PRST — PIT Reset Bit
Setting this write-only bit resets the PIT counter and the PIT prescaler. Setting PRST has no effect on
any other registers. Counting resumes from $0000. PRST is cleared automatically after the PIT
counter is reset and always reads as logic zero. Reset clears the PRST bit.
1 = Prescaler and PIT counter cleared
0 = No effect
NOTE
Setting the PSTOP and PRST bits simultaneously stops the PIT counter at
a value of $0000.
PPS[2:0] — Prescaler Select Bits
These read/write bits select one of the seven prescaler outputs as the input to the PIT counter as Table
21-2 shows. Reset clears the PPS[2:0] bits.
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
246
Freescale Semiconductor