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Input/Output Ports
22.6 Port E
Port E is an 8-bit special function port that shares two of its pins with the timer interface module (TIMA),
two of its pins with the serial communications interface module (SCI), and four of its pins with the serial
peripheral interface module (SPI).
22.6.1 Port E Data Register
The port E data register contains a data latch for each of the eight port E pins.
Address: $0008
Bit 7
6
5
4
3
2
1
Bit 0
Read:
PTE7
Write:
PTE6
PTE5
PTE4
PTE3
PTE2
PTE1
PTE0
Reset:
Unaffected by Reset
Alternative
Function:
SPSCK
MOSI
MISO
SS
TACH1 TACH0
RxD
TxD
Figure 22-14. Port E Data Register (PTE)
PTE[7:0] — Port E Data Bits
PTE[7:0] are read/write, software programmable bits. Data direction of each port E pin is under the
control of the corresponding bit in data direction register E.
SPSCK — SPI Serial Clock Bit
The PTE7/SPSCK pin is the serial clock input of an SPI slave module and serial clock output of an SPI
master module. When the SPE bit is clear, the PTE7/SPSCK pin is available for general-purpose I/O.
(See 19.13.1 SPI Control Register).
MOSI — Master Out/Slave In Bit
The PTE6/MOSI pin is the master out/slave in terminal of the SPI module. When the SPE bit is clear,
the PTE6/MOSI pin is available for general-purpose I/O.
MISO — Master In/Slave Out Bit
The PTE5/MISO pin is the master in/slave out terminal of the SPI module. When the SPI enable bit,
SPE, is clear, the SPI module is disabled, and the PTE5/MISO pin is available for general-purpose I/O.
(See 19.13.1 SPI Control Register).
SS — Slave Select Bit
The PTE4/SS pin is the slave select input of the SPI module. When the SPE bit is clear, or when the
SPI master bit, SPMSTR, is set and MODFEN bit is low, the PTE4/SS pin is available for
general-purpose I/O. (See 19.12.4 SS (Slave Select)). When the SPI is enabled as a slave, the DDRF0
bit in data direction register E (DDRE) has no effect on the PTE4/SS pin.
NOTE
Data direction register E (DDRE) does not affect the data direction of port
E pins that are being used by the SPI module. However, the DDRE bits
always determine whether reading port E returns the states of the latches
or the states of the pins. (See Table 22-5).
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
258
Freescale Semiconductor