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MC908AZ60ACFUER Datasheet, PDF (66/414 Pages) Freescale Semiconductor, Inc – To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to:

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FLASH-2 Memory

5.6 FLASH-2 Page Erase Operation

Use this step-by-step procedure to erase a page (128 bytes) of FLASH-2 memory to read as logic 1:

1. Set the ERASE bit and clear the MASS bit in the FLASH-2 Control Register (FL2CR).

2. Read the FLASH-2 Block Protect Register (FL2BPR).

3. Write any data to any FLASH-2 address within the address range of the page (128 byte block) to

be erased.

4. Wait for time, tNVS.

5. Set the HVEN bit.

6. Wait for time, tERASE.

7. Clear the ERASE bit.

8. Wait for time, t NVH.

9. Clear the HVEN bit.

10. Wait for a time, tRCV, after which the memory can be accessed in normal read mode.

NOTE

A. Programming and erasing of FLASH locations can not be performed by

code being executed from the same FLASH array.

B. While these operations must be performed in the order shown, other

unrelated operations may occur between the steps. Care must be taken

however to ensure that these operations do not access any address within

the FLASH array memory space such as the COP Control Register

(COPCTL) at $FFFF.

C. It is highly recommended that interrupts be disabled during

program/erase operations.

5.7 FLASH-2 Program Operation

Programming of the FLASH memory is done on a row basis. A row consists of 64 consecutive bytes with

address ranges as follows:

â¢ $XX00 to $XX3F

â¢ $XX40 to $XX7F

â¢ $XX80 to $XXBF

â¢ $XXC0 to $XXFF

During the programming cycle, make sure that all addresses being written to fit within one of the ranges

specified above. Attempts to program addresses in different row ranges in one programming cycle will fail.

â¢ Use this step-by-step procedure to program a row of FLASH-2 memory.

NOTE

In order to avoid program disturbs, the row must be erased before any byte

on that row is programmed.

1. Set the PGM bit in the FLASH-2 Control Register (FL2CR). This configures the memory for

program operation and enables the latching of address and data programming.

2. Read the FLASH-2 Block Protect Register (FL2BPR).

3. Write to any FLASH-2 address within the row address range desired with any data.

MC68HC908AZ60A â¢ MC68HC908AS60A â¢ MC68HC908AS60E Data Sheet, Rev. 6

66

Freescale Semiconductor

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