MC908AZ60ACFUER Datasheet, PDF (53/414 Pages) Freescale Semiconductor, Inc – To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to:

FLASH-1 Control and Block Protect Registers
4.3.2 FLASH-1 Block Protect Register
The FLASH-1 Block Protect Register (FL1BPR) is implemented as a byte within the FLASH-1 memory
and therefore can only be written during a FLASH programming sequence. The value in this register
determines the starting location of the protected range within the FLASH-1 memory.
Address: $FF80
Read:
Write:
Bit 7
BPR7
6
BPR6
5
BPR5
4
BPR4
3
BPR3
2
BPR2
1
BPR1
Bit 0
BPR0
Figure 4-2. FLASH-1 Block Protect Register (FL1BPR)
FL1BPR[7:0] — Block Protect Register Bit 7 to Bit 0
These eight bits represent bits [14:7] of a 16-bit memory address. Bit 15 is logic 1 and bits [6:0] are
logic 0s.
The resultant 16-bit address is used for specifying the start address of the FLASH-1 memory for block
protection. FLASH-1 is protected from this start address to the end of FLASH-1 memory at $FFFF.
With this mechanism, the protect start address can be $XX00 and $XX80 (128 byte page boundaries)
within the FLASH-1 array.
16-bit memory address
Start address of FLASH block protect 1
FLBPR value
0000000
Figure 4-3. FLASH-1 Block Protect Start Address
FLASH-1 Protected Ranges
FL1BPR[7:0]
$FF
$FE
$FD
Protected Range
No Protection
$FF00 – $FFFF
$FE80 – $FFFF
$0B
$8580 – $FFFF
$0A
$8500 – $FFFF
$09
$8480 – $FFFF
$08
$8400 – $FFFF
$04
$8200 – $FFFF
$03
$8180 – $FFFF
$02
$8100 – $FFFF
$01
$8080 – $FFFF
$00
$8000 – $FFFF
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Freescale Semiconductor
53