MC908AZ60ACFUER Datasheet, PDF (285/414 Pages) Freescale Semiconductor, Inc – To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to:

Programmer’s Model of Message Storage
23.12.4 Data Segment Registers (DSRn)
The eight data segment registers contain the data to be transmitted or received. The number of bytes to
be transmitted or being received is determined by the data length code in the corresponding DLR.
23.12.5 Transmit Buffer Priority Registers
Address:
Read:
Write:
Reset:
$05bD
Bit 7
PRIO7
6
PRIO6
5
PRIO5
4
3
PRIO4 PRIO3
Unaffected by Reset
2
PRIO2
1
PRIO1
Bit 0
PRIO0
Figure 23-13. Transmit Buffer Priority Register (TBPR)
PRIO7–PRIO0 — Local Priority
This field defines the local priority of the associated message buffer. The local priority is used for the
internal prioritisation process of the MSCAN08 and is defined to be highest for the smallest binary
number. The MSCAN08 implements the following internal prioritisation mechanism:
• All transmission buffers with a cleared TXE flag participate in the prioritisation right before the SOF
is sent.
• The transmission buffer with the lowest local priority field wins the prioritisation.
• In case more than one buffer has the same lowest priority, the message buffer with the lower index
number wins.
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Freescale Semiconductor
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