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Central Processor Unit (CPU)
8.7 Instruction Set Summary
Table 8-1 provides a summary of the M68HC08 instruction set.
Source
Form
ADC #opr
ADC opr
ADC opr
ADC opr,X
ADC opr,X
ADC ,X
ADC opr,SP
ADC opr,SP
ADD #opr
ADD opr
ADD opr
ADD opr,X
ADD opr,X
ADD ,X
ADD opr,SP
ADD opr,SP
AIS #opr
AIX #opr
AND #opr
AND opr
AND opr
AND opr,X
AND opr,X
AND ,X
AND opr,SP
AND opr,SP
ASL opr
ASLA
ASLX
ASL opr,X
ASL ,X
ASL opr,SP
ASR opr
ASRA
ASRX
ASR opr,X
ASR opr,X
ASR opr,SP
BCC rel
BCLR n, opr
BCS rel
BEQ rel
BGE opr
BGT opr
BHCC rel
BHCS rel
BHI rel
Table 8-1. Instruction Set Summary (Sheet 1 of 6)
Operation
Description
Effect
on CCR
VH I NZC
Add with Carry
A ← (A) + (M) + (C)
IMM
DIR
EXT


–



IX2
IX1
IX
SP1
SP2
A9 ii
2
B9 dd 3
C9 hh ll 4
D9 ee ff 4
E9 ff
3
F9
2
9EE9 ff
4
9ED9 ee ff 5
Add without Carry
A ← (A) + (M)
IMM
DIR
EXT


–



IX2
IX1
IX
SP1
SP2
AB ii
2
BB dd 3
CB hh ll 4
DB ee ff 4
EB ff
3
FB
2
9EEB ff
4
9EDB ee ff 5
Add Immediate Value (Signed) to SP
SP ← (SP) + (16 « M)
– – – – – – IMM
A7 ii
2
Add Immediate Value (Signed) to H:X
H:X ← (H:X) + (16 « M)
– – – – – – IMM
AF ii
2
Logical AND
A ← (A) & (M)
IMM
DIR
EXT
0
–
–


–
IX2
IX1
IX
SP1
SP2
A4 ii
2
B4 dd 3
C4 hh ll 4
D4 ee ff 4
E4 ff
3
F4
2
9EE4 ff
4
9ED4 ee ff 5
Arithmetic Shift Left
(Same as LSL)
C
b7
0
b0
DIR
INH

–
–



INH
IX1
IX
SP1
38 dd 4
48
1
58
1
68 ff
4
78
3
9E68 ff
5
Arithmetic Shift Right
DIR
37 dd 4
INH
47
1
C

–
–



INH
IX1
57
1
67 ff
4
b7
b0
IX
77
3
SP1
9E67 ff
5
Branch if Carry Bit Clear
PC ← (PC) + 2 + rel ? (C) = 0
– – – – – – REL
24 rr
3
Clear Bit n in M
Mn ← 0
DIR (b0) 11 dd 4
DIR (b1) 13 dd 4
DIR (b2) 15 dd 4
–
–
–
–
–
–
DIR (b3)
DIR (b4)
17
19
dd
dd
4
4
DIR (b5) 1B dd 4
DIR (b6) 1D dd 4
DIR (b7) 1F dd 4
Branch if Carry Bit Set (Same as BLO)
PC ← (PC) + 2 + rel ? (C) = 1
– – – – – – REL
25 rr
3
Branch if Equal
PC ← (PC) + 2 + rel ? (Z) = 1
– – – – – – REL
27 rr
3
Branch if Greater Than or Equal To
(Signed Operands)
PC ← (PC) + 2 + rel ? (N ⊕ V) = 0
– – – – – – REL
90 rr
3
Branch if Greater Than (Signed
Operands)
PC ← (PC) + 2 + rel ? (Z) | (N ⊕ V) = 0 – – – – – – REL
92 rr
3
Branch if Half Carry Bit Clear
PC ← (PC) + 2 + rel ? (H) = 0
– – – – – – REL
28 rr
3
Branch if Half Carry Bit Set
PC ← (PC) + 2 + rel ? (H) = 1
– – – – – – REL
29 rr 3
Branch if Higher
PC ← (PC) + 2 + rel ? (C) | (Z) = 0 – – – – – – REL
22 rr
3
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
104
Freescale Semiconductor