MC908AZ60ACFUER Datasheet, PDF (135/414 Pages) Freescale Semiconductor, Inc – To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to:

10.4 I/O Signals
The following paragraphs describe the CGM input/output (I/O) signals.
I/O Signals
10.4.1 Crystal Amplifier Input Pin (OSC1)
The OSC1 pin is an input to the crystal oscillator amplifier.
10.4.2 Crystal Amplifier Output Pin (OSC2)
The OSC2 pin is the output of the crystal oscillator inverting amplifier.
10.4.3 External Filter Capacitor Pin (CGMXFC)
The CGMXFC pin is required by the loop filter to filter out phase corrections. A small external capacitor is
connected to this pin.
NOTE
To prevent noise problems, C_F should be placed as close to the CGMXFC
pin as possible with minimum routing distances and no routing of other
signals across the C_F connection.
10.4.4 Analog Power Pin (V_DDA)
V_DDA is a power pin used by the analog portions of the PLL. Connect the V_DDA pin to the same voltage
potential as the V_DD pin.
NOTE
Route V_DDA carefully for maximum noise immunity and place bypass
capacitors as close as possible to the package.
10.4.5 Oscillator Enable Signal (SIMOSCEN)
The SIMOSCEN signal enables the oscillator and PLL.
10.4.6 Crystal Output Frequency Signal (CGMXCLK)
CGMXCLK is the crystal oscillator output signal. It runs at the full speed of the crystal (f_CGMXCLK) and
comes directly from the crystal oscillator circuit. Figure 10-3 shows only the logical relation of CGMXCLK
to OSC1 and OSC2 and may not represent the actual circuitry. The duty cycle of CGMXCLK is unknown
and may depend on the crystal and other external factors. Also, the frequency and amplitude of
CGMXCLK can be unstable at startup.
10.4.7 CGM Base Clock Output (CGMOUT)
CGMOUT is the clock output of the CGM. This signal is used to generate the MCU clocks. CGMOUT is
a 50% duty cycle clock running at twice the bus frequency. CGMOUT is software programmable to be
either the oscillator output, CGMXCLK, divided by two or the VCO clock, CGMVCLK, divided by two.
10.4.8 CGM CPU Interrupt (CGMINT)
CGMINT is the CPU interrupt signal generated by the PLL lock detector.
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
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