MC908AZ60ACFUER Datasheet, PDF (319/414 Pages) Freescale Semiconductor, Inc – To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to:

I/O Registers
Register Name and Address
TACNTH — $0022
Bit 7
6
5
4
3
2
1
Bit 0
Read: BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10
BIT 9
BIT 8
Write:
Reset: 0
0
0
0
0
0
0
0
Register Name and Address
TACNTL — $0023
Bit 7
6
5
4
3
2
1
Bit 0
Read: BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 25-5. TIMA Counter Registers (TACNTH and TACNTL)
25.8.3 TIMA Counter Modulo Registers
The read/write TIMA modulo registers contain the modulo value for the
TIMA counter. When the TIMA counter reaches the modulo value, the
overflow flag (TOF) becomes set and the TIMA counter resumes counting
from $0000 at the next timer clock. Writing to the high byte (TAMODH)
inhibits the TOF bit and overflow interrupts until the low byte (TAMODL) is
written. Reset sets the TIMA counter modulo registers.
Register Name and Address
TAMODH — $0024
Bit 7
6
5
4
3
2
1
Bit 0
Read:
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10
BIT 9
BIT 8
Write:
Reset: 1
1
1
1
1
1
1
1
Register Name and Address
TAMODL — $0025
Bit 7
6
5
4
3
2
1
Bit 0
Read:
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Write:
Reset: 1
1
1
1
1
1
1
1
Figure 25-6. TIMA Counter Modulo Registers (TAMODH and TAMODL)
NOTE
Reset the TIMA counter before writing to the TIMA counter modulo registers.
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Freescale Semiconductor
319