MC908AZ60ACFUER Datasheet, PDF (283/414 Pages) Freescale Semiconductor, Inc – To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to:

Addr
$05b0
$05b1
$05b2
$05b3
$05b4
$05b5
$05b6
$05b7
$05b8
$05b9
$05bA
$05bB
$05bC
Programmer’s Model of Message Storage
Register
IDR0
IDR1
IDR2
IDR3
DSR0
DSR1
DSR2
DSR3
DSR4
DSR5
DSR6
DSR7
DLR
Bit 7
6
5
4
3
2
1
Read:
ID28
ID27
ID26
ID25
ID24
ID23
ID22
Write:
Read:
ID20
ID19
ID18
SRR (=1) IDE (=1)
ID17
ID16
Write:
Read:
ID14
ID13
ID12
ID11
ID10
ID9
ID8
Write:
Read:
ID6
ID5
ID4
ID3
ID2
ID1
ID0
Write:
Read:
DB7
DB6
DB5
DB4
DB3
DB2
DB1
Write:
Read:
DB7
DB6
DB5
DB4
DB3
DB2
DB1
Write:
Read:
DB7
DB6
DB5
DB4
DB3
DB2
DB1
Write:
Read:
DB7
DB6
DB5
DB4
DB3
DB2
DB1
Write:
Read:
DB7
DB6
DB5
DB4
DB3
DB2
DB1
Write:
Read:
DB7
DB6
DB5
DB4
DB3
DB2
DB1
Write:
Read:
DB7
DB6
DB5
DB4
DB3
DB2
DB1
Write:
Read:
DB7
DB6
DB5
DB4
DB3
DB2
DB1
Write:
Read:
Write:
DLC3
DLC2
DLC1
= Unimplemented
Figure 23-11. Receive/Transmit Message Buffer Extended Identifier (IDRn)
Bit 0
ID21
ID15
ID7
RTR
DB0
DB0
DB0
DB0
DB0
DB0
DB0
DB0
DLC0
Addr
$05b0
$05b1
$05b2
$05b3
Register
IDR0
IDR1
IDR2
IDR3
Bit 7
6
Read:
ID10
ID9
Write:
Read:
ID2
ID1
Write:
Read:
Write:
Read:
Write:
5
4
3
2
ID8
ID7
ID6
ID5
ID0
RTR
IDE(=0)
= Unimplemented
Figure 23-12. Standard Identifier Mapping
1
Bit 0
ID4
ID3
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Freescale Semiconductor
283