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Serial Peripheral Interface (SPI)
When enabled, the SPI controls data direction of the SPSCK pin regardless of the state of the data
direction register of the shared I/O port.
19.12.4 SS (Slave Select)
The SS pin has various functions depending on the current state of the SPI. For an SPI configured as a
slave, the SS is used to select a slave. For CPHA = 0, the SS is used to define the start of a transmission.
19.5 Transmission Formats Since it is used to indicate the start of a transmission, the SS must be toggled
high and low between each byte transmitted for the CPHA = 0 format. However, it can remain low
throughout the transmission for the CPHA = 1 format. See Figure 19-11.
MISO/MOSI
MASTER SS
SLAVE SS
CPHA = 0
SLAVE SS
CPHA = 1
BYTE 1
BYTE 2
BYTE 3
Figure 19-11. CPHA/SS Timing
When an SPI is configured as a slave, the SS pin is always configured as an input. It cannot be used as
a general-purpose I/O regardless of the state of the MODFEN control bit. However, the MODFEN bit can
still prevent the state of the SS from creating a MODF error. (See 19.13.2 SPI Status and Control
Register).
NOTE
A high voltage on the SS pin of a slave SPI puts the MISO pin in a
high-impedance state. The slave SPI ignores all incoming SPSCK clocks,
even if a transmission already has begun.
When an SPI is configured as a master, the SS input can be used in conjunction with the MODF flag to
prevent multiple masters from driving MOSI and SPSCK. (See 19.6.2 Mode Fault Error). For the state of
the SS pin to set the MODF flag, the MODFEN bit in the SPSCK register must be set. If the MODFEN bit
is low for an SPI master, the SS pin can be used as a general-purpose I/O under the control of the data
direction register of the shared I/O port. With MODFEN high, it is an input-only pin to the SPI regardless
of the state of the data direction register of the shared I/O port.
The CPU can always read the state of the SS pin by configuring the appropriate pin as an input and
reading the data register. (See Table 19-4).
Table 19-4. SPI Configuration
SPE SPMSTR MODFEN SPI Configuration
0
X
X
Not Enabled
1
0
X
Slave
1
1
0
Master without MODF
1
1
1
Master with MODF
X = don’t care
State of SS Logic
General-Purpose I/O;
SS Ignored by SPI
Input-Only to SPI
General-Purpose I/O;
SS Ignored by SPI
Input-Only to SPI
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
220
Freescale Semiconductor