MC908AZ60ACFUER Datasheet, PDF (331/414 Pages) Freescale Semiconductor, Inc – To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to:

26.7.1 ADC Status and Control Register
The following paragraphs describe the function of the ADC status and control register.
I/O Registers
Address: $0038
Bit 7
6
5
4
3
2
1
Bit 0
Read: COCO
AIEN
ADCO
CH4
CH3
CH2
CH1
CH0
Write: R
Reset: 0
0
0
1
1
1
1
1
R
= Reserved
Figure 26-2. ADC Status and Control Register (ADSCR)
COCO — Conversions Complete Bit
When the AIEN bit is a logic 0, the COCO is a read-only bit which is set each time a conversion is
completed. This bit is cleared whenever the ADC status and control register is written or whenever the
ADC data register is read.
If the AIEN bit is a logic 1, the COCO is a read/write bit which selects the CPU to service the ADC
interrupt request. Reset clears this bit.
1 = conversion completed (AIEN = 0)
0 = conversion not completed (AIEN = 0)
or
CPU interrupt enabled (AIEN = 1)
AIEN — ADC Interrupt Enable Bit
When this bit is set, an interrupt is generated at the end of an ADC conversion. The interrupt signal is
cleared when the data register is read or the status/control register is written. Reset clears the AIEN bit.
1 = ADC interrupt enabled
0 = ADC interrupt disabled
ADCO — ADC Continuous Conversion Bit
When set, the ADC will convert samples continuously and update the ADR register at the end of each
conversion. Only one conversion is allowed when this bit is cleared. Reset clears the ADCO bit.
1 = Continuous ADC conversion
0 = One ADC conversion
ADCH[4:0] — ADC Channel Select Bits
ADCH4, ADCH3, ADCH2, ADCH1, and ADCH0 form a 5-bit field which is used to select one of 15 ADC
channels. Channel selection is detailed in the following table. Care should be taken when using a port
pin as both an analog and a digital input simultaneously to prevent switching noise from corrupting the
analog signal. See Table 26-1.
The ADC subsystem is turned off when the channel select bits are all set to one. This feature allows
for reduced power consumption for the MCU when the ADC is not used. Reset sets these bits.
NOTE
Recovery from the disabled state requires one conversion cycle to stabilize.
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Freescale Semiconductor
331