MC908AZ60ACFUER Datasheet, PDF (171/414 Pages) Freescale Semiconductor, Inc – To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to:

Chapter 17
External Interrupt Module (IRQ)
17.1 Introduction
This chapter describes the nonmaskable external interrupt (IRQ) input.
17.2 Features
Features include:
• Dedicated External Interrupt Pin (IRQ)
• Hysteresis Buffer
• Programmable Edge-Only or Edge- and Level-Interrupt Sensitivity
• Automatic Interrupt Acknowledge
17.3 Functional Description
A falling edge applied to the external interrupt pin can latch a CPU interrupt request. Figure 17-1 shows
the structure of the IRQ module.
Interrupt signals on the IRQ pin are latched into the IRQ latch. An interrupt latch remains set until one of
the following actions occurs:
• Vector fetch — A vector fetch automatically generates an interrupt acknowledge signal that clears
the latch that caused the vector fetch.
• Software clear — Software can clear an interrupt latch by writing to the appropriate acknowledge
bit in the interrupt status and control register (ISCR). Writing a logic 1 to the ACK bit clears the IRQ
latch.
• Reset — A reset automatically clears both interrupt latches.
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Freescale Semiconductor
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