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MC908AZ60ACFUER Datasheet, PDF (49/414 Pages) Freescale Semiconductor, Inc – To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to:
Chapter 3
Random-Access Memory (RAM)
3.1 Introduction
This chapter describes the 2048 bytes of random-access memory (RAM).
3.2 Functional Description
Addresses $0050 through $044F and $0A00 through $0DFF are RAM locations. The location of the stack
RAM is programmable with the reset stack pointer instruction (RSP). The 16-bit stack pointer allows the
stack RAM to be anywhere in the 64K-byte memory space.
NOTE
For correct operation, the stack pointer must point only to RAM locations.
Within page zero are 176 bytes of RAM. Because the location of the stack RAM is programmable, all page
zero RAM locations can be used for input/output (I/O) control and user data or code. When the stack
pointer is moved from its reset location at $00FF, direct addressing mode instructions can access all page
zero RAM locations efficiently. Page zero RAM, therefore, provides ideal locations for frequently
accessed global variables.
Before processing an interrupt, the CPU uses five bytes of the stack to save the contents of the CPU
registers.
NOTE
For M68HC05, M6805, and M146805 compatibility, the H register is not
stacked.
During a subroutine call, the CPU uses two bytes of the stack to store the return address. The stack
pointer decrements during pushes and increments during pulls.
NOTE
Be careful when using nested subroutines. The CPU could overwrite data
in the RAM during a subroutine or during the interrupt stacking operation.
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Freescale Semiconductor
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