MC908AZ60ACFUER Datasheet, PDF (194/414 Pages) Freescale Semiconductor, Inc – To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to:

Serial Communications Interface (SCI)
0 = Idle character bit count begins after start bit
PEN — Parity Enable Bit
This read/write bit enables the SCI parity function. (See Table 18-8). When enabled, the parity function
inserts a parity bit in the most significant bit position. (See Table 18-7). Reset clears the PEN bit.
1 = Parity function enabled
0 = Parity function disabled
PTY — Parity Bit
This read/write bit determines whether the SCI generates and checks for odd parity or even parity.
(See Table 18-8). Reset clears the PTY bit.
1 = Odd parity
0 = Even parity
NOTE
Changing the PTY bit in the middle of a transmission or reception can
generate a parity error.
Table 18-8. Character Format Selection
Control Bits
M
PEN:PTY
0
0X
1
0X
0
10
0
11
1
10
1
11
Start
Bits
1
1
1
1
1
1
Data
Bits
8
9
7
7
8
8
Character Format
Parity
Stop
Bits
None
1
None
1
Even
1
Odd
1
Even
1
Odd
1
Character
Length
10 Bits
11 Bits
10 Bits
10 Bits
11 Bits
11 Bits
18.8.2 SCI Control Register 2
SCI control register 2:
• Enables the following CPU interrupt requests:
– Enables the SCTE bit to generate transmitter CPU interrupt requests
– Enables the TC bit to generate transmitter CPU interrupt requests
– Enables the SCRF bit to generate receiver CPU interrupt requests
– Enables the IDLE bit to generate receiver CPU interrupt requests
• Enables the transmitter
• Enables the receiver
• Enables SCI wakeup
• Transmits SCI break characters
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
194
Freescale Semiconductor