MC908AZ60ACFUER Datasheet, PDF (262/414 Pages) Freescale Semiconductor, Inc – To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to:

Input/Output Ports
DDRF[6:0] — Data Direction Register F Bits
These read/write bits control port F data direction. Reset clears DDRF[6:0], configuring all port F pins
as inputs.
1 = Corresponding port F pin configured as output
0 = Corresponding port F pin configured as input
NOTE
Avoid glitches on port F pins by writing to the port F data register before
changing data direction register F bits from 0 to 1.
Figure 22-19 shows the port F I/O logic.
READ DDRF ($000D)
WRITE DDRF ($000D)
RESET
DDRFx
WRITE PTF ($0009)
PTFx
PTFx
READ PTF ($0009)
Figure 22-19. Port F I/O Circuit
When bit DDRFx is a logic 1, reading address $0009 reads the PTFx data latch. When bit DDRFx is a
logic 0, reading address $0009 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 22-6 summarizes the operation of the port F pins.
Table 22-6. Port F Pin Functions
DDRF
PTF
I/O Pin
Accesses to DDRF
Bit
Bit
Mode
Read/Write
0
X
Input, Hi-Z
DDRF[6:0]
1
X
Output
DDRF[6:0]
X = don’t care
Hi-Z = high impedance
1. Writing affects data register, but does not affect input.
Accesses to PTF
Read
Write
Pin
PTF[6:0]⁽¹⁾
PTF[6:0]
PTF[6:0]
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
262
Freescale Semiconductor