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Chapter 19
Serial Peripheral Interface (SPI)
19.1 Introduction
This chapter describes the serial peripheral interface (SPI) module, which allows full-duplex,
synchronous, serial communications with peripheral devices.
19.2 Features
Features of the SPI module include:
• Full-Duplex Operation
• Master and Slave Modes
• Double-Buffered Operation with Separate Transmit and Receive Registers
• Four Master Mode Frequencies (Maximum = Bus Frequency ÷ 2)
• Maximum Slave Mode Frequency = Bus Frequency
• Serial Clock with Programmable Polarity and Phase
• Two Separately Enabled Interrupts with CPU Service:
– SPRF (SPI Receiver Full)
– SPTE (SPI Transmitter Empty)
• Mode Fault Error Flag with CPU Interrupt Capability
• Overflow Error Flag with CPU Interrupt Capability
• Programmable Wired-OR Mode
• I²C (Inter-Integrated Circuit) Compatibility
19.3 Pin Name and Register Name Conventions
The generic names of the SPI input/output (I/O) pins are:
• SS (slave select)
• SPSCK (SPI serial clock)
• MOSI (master out slave in)
• MISO (master in slave out)
The SPI shares four I/O pins with a parallel I/O port. The full name of an SPI pin reflects the name of the
shared port pin. Table 19-1 shows the full names of the SPI I/O pins. The generic pin names appear in
the text that follows.
Table 19-1. Pin Name Conventions
SPI Generic Pin Name
Full SPI Pin Name
MISO
PTE5/MISO
MOSI
PTE6/MOSI
SS
PTE4/SS
SPSCK
PTE7/SPSCK
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Freescale Semiconductor
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