MC908AZ60ACFUER Datasheet, PDF (63/414 Pages) Freescale Semiconductor, Inc – To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to:

FLASH-2 Control and Block Protect Registers
Address: $FF81
Bit 7
6
5
4
3
2
1
Bit 0
Read:
BPR7
Write:
BPR6
BPR5
BPR4
BPR3
BPR2
BPR1
BPR0
Figure 5-2. FLASH-2 Block Protect Register (FL2BPR)
NOTE
The FLASH-2 Block Protect Register (FL2BPR) controls the block
protection for the FLASH-2 array. However, FL2BPR is implemented within
the FLASH-1 memory array and therefore, the FLASH-1 Control Register
(FL1CR) must be used to program/erase FL2BPR.
FL2BPR[7:0] — Block Protect Register Bit 7 to Bit 0
These eight bits represent bits [14:7] of a 16-bit memory address. Bit 15 is logic 1 and bits [6:0] are
logic 0s.
The resultant 16-bit address is used for specifying the start address of the FLASH-2 memory for block
protection. FLASH-2 is protected from this start address to the end of FLASH-2 memory at $7FFF.
With this mechanism, the protect start address can be $XX00 and $XX80 (128 byte page boundaries)
within the FLASH-2 array.
Start address of FLASH block protect 1
16-bit memory address
FLBPR value
0000000
Figure 5-3. FLASH-2 Block Protect Start Address
FLASH-2 Protected Ranges:
FL2BPR[7:0]
$FF
$FE
$FD
Protected Range
No Protection
$7F00 – $7FFF
$7E80 – $7FFF
$0B
$0580 – $7FFF
$0A
$0500 – $7FFF
$09
$0480 – $7FFF
$08
$0450 – $7FFF
$04
$0450 – $7FFF
$03
$0450 – $7FFF
$02
$0450 – $7FFF
$01
$0450 – $7FFF
$00
$0450 – $7FFF
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Freescale Semiconductor
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