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MC908AZ60ACFUER Datasheet, PDF (187/414 Pages) Freescale Semiconductor, Inc – To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to:
Functional Description
To verify the start bit and to detect noise, data recovery logic takes samples at RT3, RT5, and RT7. Table
18-5 summarizes the results of the start bit verification samples.
Table 18-5. Start Bit Verification
RT3, RT5, and RT7 Samples
000
001
010
011
100
101
110
111
Start Bit Verification
Yes
Yes
Yes
No
Yes
No
No
No
Noise Flag
0
1
1
0
1
0
0
0
If start bit verification is not successful, the RT clock is reset and a new search for a start bit begins.
To determine the value of a data bit and to detect noise, recovery logic takes samples at RT8, RT9, and
RT10. Table 18-6 summarizes the results of the data bit samples.
Table 18-6. Data Bit Recovery
RT8, RT9, and RT10 Samples
000
001
010
011
100
101
110
111
Data Bit Determination
0
0
0
1
0
1
1
1
Noise Flag
0
1
1
1
1
1
1
0
NOTE
The RT8, RT9, and RT10 samples do not affect start bit verification. If any
or all of the RT8, RT9, and RT10 start bit samples are logic 1s following a
successful start bit verification, the noise flag (NF) is set and the receiver
assumes that the bit is a start bit.
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Freescale Semiconductor
187