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MC908AZ60ACFUER Datasheet, PDF (24/414 Pages) Freescale Semiconductor, Inc – To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to:
M68HC08 CPU
CPU
REGISTERS
ARITHMETIC/LOGIC
UNIT (ALU)
CONTROL AND STATUS REGISTERS — 62 BYTES
USER FLASH — 60 kBYTES
USER RAM — 2048BYTES
USER EEPROM — 1024 BYTES
MONITOR ROM — 256 BYTES
USER FLASH VECTOR SPACE — 52 BYTES
OSC1
OSC2
CGMXFC
CLOCK GENERATOR
MODULE
RST
SYSTEM INTEGRATION
MODULE
VREFH
ANALOG-TO-DIGITAL
MODULE
BREAK MODULE
LOW-VOLTAGE INHIBIT
MODULE
COMPUTER OPERATING
PROPERLY MODULE
TIMER A 6 CHANNEL
INTERFACE MODULE
PROGRAMMABLE INTERRUPT
TIMER MODULE
SERIAL COMMUNICATIONS
INTERFACE MODULE
SERIAL PERIPHERAL
INTERFACE MODULE
IRQ
VSS
VDD
VDDA
VSSA
IRQ MODULE
POWER-ON RESET
MODULE
POWER
KEYBOARD INTERRUPT
MODULE*
BYTE DATA LINK CONTROLLER
AVSS/VREFL
VDDAREF
* = Feature only available on the 64-pin QFP MC68HC908AS60A
PTA7–PTA0
PTB7/ATD7–PTB0/ATD0
PTC5*
PTC4
PTC3
PTC2/MCLK
PTC1–PTC0
PTD7*
PTD6/ATD14/TACLK
PTD5/ATD13
PTD4/ATD12/TBCLK
PTD3/ATD11-PTD0/ATD8
PTE7/SPSCK
PTE6/MOSI
PTE5/MISO
PTE4/SS
PTE3/TACH1
PTE2/TACH0
PTE1/RxD
PTE0/TxD
PTF6*
PTF5/TBCH1–PTF4/TBCH0*
PTF3/TACH5-PTF0/TACH2
PTG2/KBD2–PTG0/KBD0*
PTH1/KBD4–PTH0/KBD3*
Figure 1-2. MCU Block Diagram for the MC68HC908AS60A (64-Pin QFP and 52-Pin PLCC)