MC908AZ60ACFUER Datasheet, PDF (228/414 Pages) Freescale Semiconductor, Inc – To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to:

Timer Interface Module B (TIMB)
PTD4/ATD12/TBCLK
INTERNAL
BUS CLOCK
TCLK
PRESCALER
PRESCALER SELECT
TSTOP
TRST
16-BIT COUNTER
16-BIT COMPARATOR
TMODH:TMODL
CHANNEL 0
16-BIT COMPARATOR
TCH0H:TCH0L
16-BIT LATCH
CHANNEL 1
16-BIT COMPARATOR
TCH1H:TCH1L
16-BIT LATCH
PS2
PS1
PS0
ELS0B ELS0A
CH0F
MS0A
ELS1B ELS1A
MS0B
MS1A
CH1F
TOF
TOIE
TOV0
CH0MAX
CH0IE
TOV1
CH1MAX
CH1IE
Figure 20-1. TIMB Block Diagram
INTER-
RUPT
LOGIC
PTF4
LOGIC
INTER-
RUPT
LOGIC
PTF4/TBCH0
PTF5
LOGIC
INTER-
RUPT
LOGIC
PTF5/TBCH1
Addr.
$0040
$0041
$0042
$0043
$0044
$0045
$0046
$0047
$0048
$0049
$004A
Register Name
Bit 7
TIMB Status/Control Register (TBSC) TOF
TIMB Counter Register High (TBCNTH) Bit 15
TIMB Counter Register Low (TBCNTL) Bit 7
TIMB Counter Modulo Reg. High (TBMODH) Bit 15
TIMB Counter Modulo Reg. Low (TBMODL) Bit 7
TIMB Ch. 0 Status/Control Register (TBSC0) CH0F
TIMB Ch. 0 Register High (TBCH0H) Bit 15
TIMB Ch. 0 Register Low (TBCH0L) Bit 7
TIMB Ch. 1 Status/Control Register (TBSC1) CH1F
TIMB Ch. 1 Register High (TBCH1H) Bit 15
TIMB Ch. 1 Register Low (TBCH1L) Bit 7
6
TOIE
14
6
14
6
CH0IE
14
6
CH1IE
14
6
5
TSTOP
13
5
13
5
MS0B
13
5
0
13
5
4
TRST
12
4
12
4
MS0A
12
4
MS1A
12
4
3
0
11
3
11
3
ELS0B
11
3
ELS1B
11
3
2
PS2
10
2
10
2
ELS0A
10
2
ELS1A
10
2
1
PS1
9
1
9
1
TOV0
9
1
TOV1
9
1
Bit 0
PS0
Bit 8
Bit 0
Bit 8
Bit 0
CH0MAX
Bit 8
Bit 0
CH1MAX
Bit 8
Bit 0
R = Reserved
Figure 20-2. TIMB I/O Register Summary
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
228
Freescale Semiconductor