MC908AZ60ACFUER Datasheet, PDF (248/414 Pages) Freescale Semiconductor, Inc – To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to:

Programmable Interrupt Timer (PIT)
21.7.3 PIT Counter Modulo Registers
The read/write PIT modulo registers contain the modulo value for the PIT counter. When the PIT counter
reaches the modulo value the overflow flag (POF) becomes set and the PIT counter resumes counting
from $0000 at the next timer clock. Writing to the high byte (PMODH) inhibits the POF bit and overflow
interrupts until the low byte (PMODL) is written. Reset sets the PIT counter modulo registers.
Address: $004E:$004F
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 15
14
13
12
11
10
Write:
Reset: 1
1
1
1
1
1
9
Bit 8
1
1
Address: $004E:$004F
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset: 1
1
1
1
1
1
1
1
Figure 21-5. PIT Counter Modulo Registers (PMODH–PMODL)
NOTE
Reset the PIT counter before writing to the PIT counter modulo registers.
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
248
Freescale Semiconductor