MC908AZ60ACFUER Datasheet, PDF (332/414 Pages) Freescale Semiconductor, Inc – To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to:

Analog-to-Digital Converter (ADC)
Table 26-1. Mux Channel Select
ADCH4 ADCH3 ADCH2 ADCH1 ADCH0
Input Select
0
0
0
0
0
PTB0/ATD0
0
0
0
0
1
PTB1/ATD1
0
0
0
1
0
PTB2/ATD2
0
0
0
1
1
PTB3/ATD3
0
0
1
0
0
PTB4/ATD4
0
0
1
0
1
PTB5/ATD5
0
0
1
1
0
PTB6/ATD6
0
0
1
1
1
PTB7/ATD7
0
1
0
0
0
PTD0/ATD8/ATD8
0
1
0
0
1
PTD1/ATD9/ATD9
0
1
0
1
0
PTD2/ATD10/ATD10
0
1
0
1
1
PTD3/ATD11/ATD11
0
1
1
0
0
PTD4/ATD12/TBCLK/ATD12
0
1
1
0
1
PTD5/ATD13/ATD13
0
1
1
1
0
PTD6/ATD14/TACLK/ATD14
Range 01111 ($0F) to 11010 ($1A)
Unused (see Note 1)
Unused (see Note 1)
1
1
0
1
1
Reserved
1
1
1
0
0
Unused (see Note 1)
1
1
1
0
1
V_REFH (see Note 2)
1
1
1
1
0
V_SSA/V_REFL (see Note 2)
1
1
1
1
1
[ADC power off]
Notes:
1. If any unused channels are selected, the resulting ADC conversion will be unknown.
2. The voltage levels supplied from internal reference nodes as specified in the table are used
to verify the operation of the ADC converter both in production test and for user applica-
tions.
26.7.2 ADC Data Register
One 8-bit result register is provided. This register is updated each time an ADC conversion completes.
Address: $0039
Bit 7
6
5
4
3
2
1
Bit 0
Read: AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
Write:
Reset:
Indeterminate after Reset
= Unimplemented
Figure 26-3. ADC Data Register (ADR)
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
332
Freescale Semiconductor