MC908AZ60ACFUER Datasheet, PDF (68/414 Pages) Freescale Semiconductor, Inc – To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to:

FLASH-2 Memory
Algorithm for programming
a row (64 bytes) of FLASH memory
1
Set PGM bit
2 _{Read the FLASH block protect register}
3 _{Write any data to any FLASH address}
within the row address range desired
4
Wait for a time, t_nvs
5
Set HVEN bit
6
Wait for a time, t_pgs
7
Write data to the FLASH address
to be programmed
8
Wait for a time, t_PROG
Completed
Y
programming
this row?
N
10
NOTE:
The time between each FLASH address change (step 7 to step 7), or
the time between the last FLASH address programmed
11
to clearing PGM bit (step 7 to step 10)
must not exceed the maximum programming
time, t_PROG max.
12
This row program algorithm assumes the row/s
to be programmed are initially erased.
13
Clear PGM bit
Wait for a time, t_nvh
Clear HVEN bit
Wait for a time, t_rcv
End of programming
Figure 5-4. FLASH Programming Algorithm Flowchart
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
68
Freescale Semiconductor