MC908AZ60ACFUER Datasheet, PDF (370/414 Pages) Freescale Semiconductor, Inc – To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to:

Electrical Specifications
SS
(INPUT)
SS pin of master held high.
SCK (CPOL = 0)
(OUTPUT)
NOTE
1
5
4
SCK (CPOL = 1)
(OUTPUT)
NOTE
5
4
MISO
(INPUT)
10
MOSI
(OUTPUT)
MSB IN
11
MASTER MSB OUT
12
13
BITS 6–1
10
BITS 6–1
NOTE: This first clock edge is generated internally, but is not seen at the SCK pin.
a) SPI Master Timing (CPHA = 0)
6
7
LSB IN
11
MASTER LSB OUT
SS
(INPUT)
SCK (CPOL = 0)
(OUTPUT)
SS pin of master held high.
1
5
4
SCK (CPOL = 1)
(OUTPUT)
5
4
MISO
(INPUT)
10
MOSI
(OUTPUT)
MSB IN
11
MASTER MSB OUT
12
13
BITS 6–1
10
BITS 6–1
NOTE: This last clock edge is generated internally, but is not seen at the SCK pin.
b) SPI Master Timing (CPHA = 1)
6
7
LSB IN
11
MASTER LSB OUT
Figure 28-1. SPI Master Timing Diagram
NOTE
NOTE
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
370
Freescale Semiconductor